CCWN76:94



per seconds and thus the Q output is a 1000 Hz square wave.
Now suppose only every ninth clock input is heeded. The
actual instand the D input changed state can now be known only
to the nearest microseconds but other than that, nothing is
changed. Since the clock input is actually 1 MHz and not 9 MHzs
we actually are 0-ignoring" eight out of every nine of our
imaginary 9-MHz input. In more general terms# this D-flipflop
11mixer" produces an output which is the difference between the
frequency of the D input and the nearest harmonic of the clock
signal. Very handy indeed!


The 14553 IC is a divide-by 1000.   The output it gives to the
4046 phase detector is exactly 1000 Hz.    The 4046 compares


the frequency of its two inputs on pins 3 and 14. If both
inputs are exactly in frequency and phase, the output on pin
13 is an open circuit and the control voltage stays where it
is on account of the charged capacitors. Now suppose the
oscillator drifts up in frequency. Then the signal to pin 3
of the 4045 drifts up by exactly the same amount. The 4046
generates narrow pulses to ground on pin 13., discharging the
capacitors and bringing the control voltage down, bringing the
oscillator frequency down until it is correct again. If the
oscillator drifts low, the phase detector pulses up,, bringing
the oscillator back up. In this manner the b.f.o. is kept
at exactly 9.001 000 ABz with respect to the 1.000 000 MHz
input from the frequency standard.